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- //
- // Generated by NVIDIA NVVM Compiler
- //
- // Compiler Build ID: CL-26907403
- // Cuda compilation tools, release 10.1, V10.1.243
- // Based on LLVM 3.4svn
- //
-
- .version 6.4
- .target sm_60
- .address_size 64
-
- // .globl Fused_Add_split_15607711691747104488_kernel0
-
- .visible .entry Fused_Add_split_15607711691747104488_kernel0(
- .param .u64 Fused_Add_split_15607711691747104488_kernel0_param_0,
- .param .u64 Fused_Add_split_15607711691747104488_kernel0_param_1,
- .param .u64 Fused_Add_split_15607711691747104488_kernel0_param_2
- )
- {
- .reg .f32 %f<21>;
- .reg .b32 %r<6>;
- .reg .b64 %rd<11>;
-
-
- ld.param.u64 %rd1, [Fused_Add_split_15607711691747104488_kernel0_param_0];
- ld.param.u64 %rd2, [Fused_Add_split_15607711691747104488_kernel0_param_1];
- ld.param.u64 %rd3, [Fused_Add_split_15607711691747104488_kernel0_param_2];
- cvta.to.global.u64 %rd4, %rd1;
- cvta.to.global.u64 %rd5, %rd2;
- mov.u32 %r1, %ctaid.x;
- shl.b32 %r2, %r1, 7;
- mov.u32 %r3, %tid.x;
- shl.b32 %r4, %r3, 2;
- add.s32 %r5, %r4, %r2;
- mul.wide.s32 %rd6, %r5, 4;
- add.s64 %rd7, %rd5, %rd6;
- ld.global.nc.v4.f32 {%f1, %f2, %f3, %f4}, [%rd7];
- add.s64 %rd8, %rd4, %rd6;
- ld.global.nc.v4.f32 {%f9, %f10, %f11, %f12}, [%rd8];
- cvta.to.global.u64 %rd9, %rd3;
- add.s64 %rd10, %rd9, %rd6;
- add.f32 %f17, %f12, %f4;
- add.f32 %f18, %f11, %f3;
- add.f32 %f19, %f10, %f2;
- add.f32 %f20, %f9, %f1;
- st.global.v4.f32 [%rd10], {%f20, %f19, %f18, %f17};
- ret;
- }
-
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